Method of and circuit arrangement for reading and/or writing an integrated semiconductor storage with storage cells in MTL (I.sup.2 L) technology

US4330853A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Helmut H. Heimeier · Herrenberg, DE
• Wielfried Klein · Holzgerlingen, DE
• Erich Klink · Schenefeld, DE
• Friedrich-Christian Wernicke · Holzgerlingen, DE

Key dates

• Filing date: Apr 3, 1980
• Grant date: May 18, 1982
• Expiry date: Apr 3, 2000

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C11/416
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Semiconductor storage in which the current necessary for reading and/or writing the storage cells is generated simply by discharging input capacitances of the non-selected storage cells and is fed directly to the selected storage cells for reading and/or writing.