Superior ohmic contacts to III-V semiconductor by virtue of double donor impurity
US4344980A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 25, 1981 |
| Grant date | Aug 17, 1982 |
| Priority date | — |
| Expiry date | Mar 25, 2001 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/084
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating superior ohmic contacts in a III-V semiconductor wafer by virtue of double donor (or double acceptor) impurity complex formation. A typical III-V, e.g., GaAs, semiconductor device is fabricated by depositing a thin Si.sub.3 N.sub.4 layer and then regions are opened, by photoresist methods, upon which ohmic contacts are to be made. New resist is applied over the wafer and the ohmic contact regions are again opened. Si ions are now implanted to form the active channel and the drain and source regions (in an FET device). The resist layer is removed, a layer of Ge is laid down and a layer of Se over the Ge. The Ge layer is coated with a layer of SiO.sub.2, Si.sub.3 N.sub.4 or a mixture of both, and annealed, causing the Ge and Se to diffuse rapidly into the Si ion implant region. The SiO.sub.2, Si.sub.3 N.sub.4 and excess surface Ge and Se is now removed. Metallization of the electrode areas, preferably with reliable refractory metals, is effected, producing ohmic tunneling contacts over the Ge/Se diffused regions and rectifying, non-ohmic, Schottky barrier contacts over the selected remainder of the Si-implanted region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.