Method of fabricating an integrated circuit device utilizing electron beam irradiation and selective oxidation
US4348804A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 1979 |
| Grant date | Sep 14, 1982 |
| Priority date | — |
| Expiry date | Jul 10, 1999 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/911
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Dielectric isolation through electron beam irradiation is applied to a method of fabricating a semiconductor device. Upon forming an insulated gate field effect semiconductor device (FET) in a semiconductor layer on an insulation substrate, the insulated gate electrode is formed to extend over the semiconductor layer region around a semiconductor region in which FET is to be implemented. A semiconductor layer pattern underlying the extension of the gate electrode is enclosed by linear dielectric layers formed along the periphery of the electrode extension through electron beam irradiation. The pattern formation can be accomplished in a short time by virtue of arrangement such that the semiconductor layer pattern is enclosed by the linear dielectric layers. Electric coupling such as capacitive coupling between the gate electrode and other conductor layers is significantly reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.