Patent · US Expired

Method for manufacture of integrated semiconductor circuits, in particular CCD-circuits, with self-adjusting, nonoverlapping polysilicon electrodes

US4352237A · kind A · utility

7Cited by
7References
1Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 16, 1980
Grant dateOct 5, 1982
Priority date
Expiry dateSep 16, 2000

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S438/911

Abstract

In an exemplary embodiment, after underetching a first polysilicon layer beneath spaced SiO.sub.2 cover layers to produce pairs of confronting SiO.sub.2 overhangs with gaps therebetween, and providing an insulating layer at the end faces of the spaced poly-Si-1 electrodes formed from the first polysilicon layer, a second polysilicon layer is produced by chemical vapor deposition (CVD) so as to fill the cavities beneath the SiO.sub.2 overhangs via the gaps between each pair of confronting overhangs. The second polysilicon layer is then etched away so as to leave intervening self-adjusting, nonoverlapping poly-Si-2 electrodes formed from the second polysilicon layer with surfaces terminating for example slightly below the upper surfaces of the SiO.sub.2 cover layers. For a center-to-center spacing of poly-Si-1 electrodes of six microns, the SiO.sub.2 overhangs may have an extent (e.g. 0.7 microns) about equal to the electrode layer thickness (e.g. 0.8 microns).

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.