Complementary transistor structure
US4357622A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 1980 |
| Grant date | Nov 2, 1982 |
| Priority date | — |
| Expiry date | Jan 18, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/673
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Complementary, vertical bipolar NPN and PNP transistors are fabricated on the same monolithic semiconductor substrate which have matched high performance characteristics. A method for fabricating such complementary devices is also provided. In the method, a barrier region of a first conductivity type is formed on the surface of the monocrystalline semiconductor substrate doped with a second conductivity type. After an annealing heat treatment to drive in the doping ions of the barrier region, a collector region for one of the complementary transistors of a second conductivity type is formed within the barrier region. It is convenient to simultaneously form isolation regions of a second conductivity type in the substrate while forming the collector region. A collector region of a first conductivity type is then formed in the substrate for the other of the complementary transistors. The collector region for the other complementary transistor is formed within at least one other isolation region. An epitaxial layer of semiconductor material doped with ions of the first conductivity type is then formed on the surface of the substrate. To provide improved PNP transistor performance, the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.