Method of making MIS-field effect transistor having a short channel length

US4382826A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Hans-Jorg Pfleiderer · Zorneding, DE
• Dietrich Widmann · Unterhaching, DE

Key dates

• Filing date: Mar 30, 1981
• Grant date: May 10, 1983
• Expiry date: Mar 30, 2001

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/518
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An MIS-field effect transistor comprising a semiconductor member provided with an overlying insulating layer and having a source zone and a drain zone of a first conductivity type provided with respective contacting electrodes, and a gate-electrode layer disposed therebetween, with each of said areas being surrounded by a less heavily doped area of the same conductivity type. At the source side, an additional area abuts the source zone and extends to the semiconductor surface beneath the gate-electrode layer, forming a channel having a very short length. The various dopings having different penetration depths are produced by differential implantation. A windowed mask, having windows with beveled edges at the drain-zone and the source zone, is utilized as an implantation mask, which advantageously is formed by the insulating layer and/or by the gate-electrode layer. Such a field effect transistor is particularly suited for integrated semiconductor circuits due to its high breakdown voltage and high switching speed resulting from the short channel length.