Wafer tilt compensation in zone plate alignment system
US4398824A · kind A · utility
28Cited by
3References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1981 |
| Grant date | Aug 16, 1983 |
| Priority date | — |
| Expiry date | Apr 15, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F9/7076
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention is a method and apparatus for aligning a semiconductor wafer to be patterned by a step-and-repeat photolithographic system. The inventive alignment technique, which is able to compensate for local wafer tilt and/or nonuniform photoresist thickness, is applicable to semiconductor wafers which have, on a surface portion, one or more Fresnel zone plate alignment marks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.