Mask-saving technique for forming CMOS source/drain regions

US4406710A · kind A · utility

Inventors

• Roderick D. Davies · Richardson, US
• David B. Scott · Plano, US

Key dates

• Filing date: Oct 15, 1981
• Grant date: Sep 27, 1983
• Expiry date: Oct 15, 2001

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0165
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

CMOS source/drain regions of both conductivity types are formed using only a single masking step. One dopant is applied to both types of source/drain regions, and a second dopant is applied at a much higher dose and energy to only one type of source/drain region. Preferably, boron and arsenic are used as the dopants in silicon, since the cooperative doping effect causes the boron in the counterdoped source/drain regions to be entirely contained within the arsenic diffusion.