Planar structure for high voltage semiconductor devices with gaps in glassy layer over high field regions
US4412242A · kind A · utility
54Cited by
10References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 17, 1980 |
| Grant date | Oct 25, 1983 |
| Priority date | — |
| Expiry date | Nov 17, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/157
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Two gaps are placed in the reflowed phosphorus-doped silicon dioxide material overcoating of a planar high voltage semiconductor device to prevent polarization of the reflowed silox. The invention is applicable to any device using a polarizable glassy coating which will be exposed to a high electric field extending along its surface and is shown applied to a high voltage diode, a high voltage MOSFET and a high voltage TRIMOS-type device which is a semiconductor switching device using spaced MOS transistors having a common drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.