Three state output circuit
US4449064A · kind A · utility
9Cited by
5References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 2, 1981 |
| Grant date | May 15, 1984 |
| Priority date | — |
| Expiry date | Apr 2, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09429
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A three state output circuit which pulls down the output node thereof to a first supply voltage in response to an assert signal, pulls up the output node to a second supply voltage in response to a rescind signal, and then presents a high impedance on the output node immediately after the output node is pulled up to a selected reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.