Semiconductor memory device
US4451904A · kind A · utility
27Cited by
3References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 26, 1981 |
| Grant date | May 29, 1984 |
| Priority date | — |
| Expiry date | Jan 26, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a number of conductive layers for bit and selection lines alternately juxtaposed on the surface of a semiconductor substrate beneath a field insulating layer, with a number of MOS type memory cells arranged between the conductive layers for the bit and selection lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.