Deep trench etching process using CCl.sub.2 F.sub.2 /Ar and CCl.sub.2 F.sub. /O.sub.2 RIE
US4475982A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 1983 |
| Grant date | Oct 9, 1984 |
| Priority date | — |
| Expiry date | Dec 12, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3065
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention relates to a process for forming deep trenches in semiconductor substrates by Reactive Ion Etching and more particularly relates to an etching process which prevents lateral etching or "blooming" in a heavily doped semiconductor region which is sandwiched by upper and lower lightly doped regions of semiconductor. Still more particularly it relates to an RIE process wherein the upper region is reactively ion etched in an atmosphere of CCl.sub.2 F.sub.2 and argon to at least a portion of the thickness of the upper region and wherein any remaining thickness of the upper region, the heavily doped region and at least a portion of the lower region are reactively ion etched in an atmosphere of CCl.sub.2 F.sub.2 and oxygen to provide a trench with uniform sidewalls.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.