Bilevel resist
US4481049A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 1984 |
| Grant date | Nov 6, 1984 |
| Priority date | — |
| Expiry date | Mar 2, 2004 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/948
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Excellent resolution in the lithographic fabrication of electronic devices is achieved with a specific bilevel resist. This bilevel resist includes an underlying layer formed with a conventional material such as a novolac resin baked at 200.degree. C. for 30 minutes and an overlying layer including a silicon containing material such as a silicon derivative of poly(methyl methacrylate). This bilevel resist has the attributes of a trilevel resist and requires significantly less processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.