DMOS With gate protection diode formed over base region
US4492974A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 1982 |
| Grant date | Jan 8, 1985 |
| Priority date | — |
| Expiry date | Feb 22, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
A semiconductor integrated circuit device is provided to include a vertical type MOSFET and a gate protection element for the MOSFET. The vertical type MOSFET is made up of a silicon layer of n-type conductivity formed on an n.sup.+ -type silicon substrate, a base region of p-type conductivity formed in the surface of the silicon layer of n-type conductivity, an n.sup.+ -type source region provided in the base region, and a gate electrode formed on a portion of the base region through a gate insulating film. The silicon substrate serves as the drain. The gate protection element is formed of a polycrystalline silicon layer which is provided on the base region through an insulating film and includes at least one pn junction. By virtue of forming the gate protection element over the base region rather than directly over the substrate, a more stable operation is achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.