Method for increasing the radiation resistance of charge storage semiconductor devices
US4506436A · kind A · utility
39Cited by
8References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 21, 1981 |
| Grant date | Mar 26, 1985 |
| Priority date | — |
| Expiry date | Dec 21, 2001 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/953
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for reducing the susceptibility of integrated circuit dynamic memory devices to environmentally produced radiation, such as alpha particles, in which a buried layer, having a majority carrier concentration substantially equal to or greater than the concentration of free carriers generated by the radiation and being between one and four orders of magnitude greater concentration than that of the semiconductor substrate, is ion implanted within a few microns of the substrate surface after at least one major high temperature processing step in the manufacturing process has been completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.