Process for forming an electrical interconnection system on a semiconductor
US4507851A · kind A · utility
24Cited by
10References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1982 |
| Grant date | Apr 2, 1985 |
| Priority date | — |
| Expiry date | Apr 30, 2002 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/906
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Disclosed is a process for depositing a metal film on a silicon oxide or silicon nitride surface. This process provides an extremely adherent metallic film and is resistant to interdiffusion between the semiconductor, the insulator, and the metal. The process includes forming contact openings through an insulating layer to a silicon substrate; sputter etching the insulating layer and exposed substrate; depositing layers of platinum, a barrier metal and a conducting metal; and heating to form platinum silicide in the contact openings. The process is useful in forming an electrical interconnection system on a semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.