Single wafer plasma etch reactor
US4534816A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 1984 |
| Grant date | Aug 13, 1985 |
| Priority date | — |
| Expiry date | Jun 22, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J37/32623
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A high pressure, high etch rate single wafer plasma reactor having a fluid cooled upper electrode including a plurality of small diameter holes or passages therethrough to provide uniform reactive gas distribution over the surface of a wafer to be etched. A fluid cooled lower electrode is spaced from the upper electrode to provide an aspect ratio (wafer diameter: spacing) greater than about 25, and includes an insulating ring at its upper surface. The insulating ring protrudes above the exposed surface of the lower electrode to control the electrode spacing and to provide a plasma confinement region whereby substantially all of the RF power is dissipated by the wafer. A plurality of spaced apart, radially extending passages through the insulating ring provide a means of uniformly exhausting the reactive gas from the plasma confinement region. Affixed to the upper electrode is a first housing which supplies reactive gas and cooling fluid, and a baffle affixed to the first housing intermediate the upper electrode and a gas inlet forms a plenum above the upper electrode and ensures uniform reactive gas distribution thereover. The first housing and upper electrode are contained within …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.