Method and apparatus for testing of electrical interconnection networks
US4565966A · kind A · utility
87Cited by
21References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 7, 1983 |
| Grant date | Jan 21, 1986 |
| Priority date | — |
| Expiry date | Mar 7, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/312
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus for testing circuit boards using two or a small number of probes for making resistive and radio frequency impedance measurements e.g. capacitive measurements. The combination of resistive and impedance measurements substantially reduces the number of tests required to verify the integrity of a circuit board. The impedance or capacitive "norm" values used in testing the circuit boards can be obtained by operating the system in a learning mode. Analysis of the data provides not only fault detection but also can indicate approximate fault location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.