Digital data processing system having dual-purpose scratchpad and address translation memory
US4569018A · kind A · utility
21Cited by
4References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 15, 1982 |
| Grant date | Feb 4, 1986 |
| Priority date | — |
| Expiry date | Nov 15, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/2515
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing uses instructions which may refer to operands in main memory by either physical or logical addresses. The central processor has an internal memory organized as two portions. The first portion provides a scratchpad memory function for the central processor and the second portion is responsive to logical addresses to provide corresponding physical addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.