Deep depletion CCD imager
US4580155A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 1982 |
| Grant date | Apr 1, 1986 |
| Priority date | — |
| Expiry date | Dec 21, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/157
Abstract
An integrated circuit device has a high resistivity silicon substrate in which a low resistivity region exists. A charge coupled array is fabricated in the high resistivity region and an output circuit is fabricated in the low resistivity region. At the boundary between the high and low resistivity regions a floating diffusion provides charge coupling between the array and the circuit. The low resistivity region is prepared in a high resistivity substrate at a temperature in excess of 1000.degree. C. to obtain a sufficiently deep low resistivity region but subsequent processing to produce the charge coupled array and the control circuit is performed at lower temperatures to minimize thermal degradation and contamination of the high resistivity region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.