Process for fabricating dielectrically isolated devices utilizing heating of the polycrystalline support layer to prevent substrate deformation
US4581814A · kind A · utility
10Cited by
7References
6Claims
0Family size
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Key dates
| Filing date | Dec 13, 1984 |
| Grant date | Apr 15, 1986 |
| Priority date | — |
| Expiry date | Dec 13, 2004 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The efficacy of dielectrically isolated device formation on a substrate is substantially enhanced through a specific set of processing steps. In particular, before silicon oxide regions, e.g., gate oxide regions, are produced, bulk polycrystalline areas are heat treated to substantially increase their polycrystalline silicon grain size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.