Reconfigurable memory using both address permutation and spare memory elements
US4584682A · kind A · utility
18Cited by
11References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 2, 1983 |
| Grant date | Apr 22, 1986 |
| Priority date | — |
| Expiry date | Sep 2, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An array substitution scheme is used to substitute a spare chip for a faulty chip when a UE condition results from an alignment of two errors in bit positions accessed through the same decoder while the bit permutation apparatus is used to misalign fault bits when they occur in bit positions accessed through different decoders.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.