Vertical IGFET with internal gate and method for making same
US4586240A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 1985 |
| Grant date | May 6, 1986 |
| Priority date | — |
| Expiry date | Jun 26, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/126
Abstract
A vertical IGFET comprising a substantially planar silicon wafer with a source electrode on one major surface and a drain electrode on the opposite major surface is disclosed. An insulated gate electrode, which includes a conductive finger portion surrounded by an insulating layer, is internally disposed in the silicon wafer such that a predetermined voltage applied to the gate electrode will regulate a current flow between the source and drain electrodes. The device is fabricated utilizing an epitaxial lateral overgrowth technique for depositing monocrystalline silicon over the insulated gate which is disposed on a silicon substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.