Multilayer interconnection structure for semiconductor device
US4587549A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 7, 1983 |
| Grant date | May 6, 1986 |
| Priority date | — |
| Expiry date | Apr 7, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multilayer interconnection structure for a semiconductor device has interconnection layers superposed on each other on the surface of a semiconductor substrate with an insulating layer interposed therebetween. Connection between the desired interconnection layers or between the desired interconnection layer and semiconductor substrate is effected by means of a contact hole formed in the respective insulating layers. Two upper and lower interconnection layers intersect each other above the contact holes, and the contact hole does not overlap part of the traverse region of the upper interconnection layer in the intersecting section.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.