Carrier for stacked semiconductor die
US4589547A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 1983 |
| Grant date | May 20, 1986 |
| Priority date | — |
| Expiry date | Jan 14, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67356
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A carrier (30) for thin flat electronic devices (36) is provided which has a high volumetric efficiency and is adapted for use with automatic handling equipment. The carrier (30) comprising a hollow tube (31) having a longitudinal interior bore (35) in which is placed a longitudinal cage of metal rails (38) which surround, guide, and hold the devices (36) in a stacked relationship. At least six rails (38) are required to avoid binding and jamming of devices (36) in bore (35). End caps (33a-b) and a moveable resilient plug (34) are used to retain the devices (36) firmly but gently in place to prevent chipping and scratching of the devices (36) during handling and shipment of the carrier (30), and to vary the capacity of the carrier (30). The carrier (30) is rugged, reuseable, and has a volumetric efficiency (devices/unit volume) three to eighteen times higher than prior art egg-crate type device carriers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.