Semiconductor integrated circuit
US4609835A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1983 |
| Grant date | Sep 2, 1986 |
| Priority date | — |
| Expiry date | Mar 1, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/82
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor integrated circuit which comprises an n-type silicon substrate, a p-type well region having an opening at a part thereof, which is formed on the surface portion of the substrate, an MOS transistor formed in the p-type region and a resistance layer extended from the drain region of the MOS transistor to the opening of the p-type well region through a insulating film formed on the surface of the substrate, in which the drain region of the MOS transistor is electrically connected to the silicon substrate through the resistance layer so that a current is supplied to the MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.