Logic level translator circuit for integrated circuit semiconductor devices having transistor-transistor logic output circuitry
US4623803A · kind A · utility
8Cited by
5References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 8, 1983 |
| Grant date | Nov 18, 1986 |
| Priority date | — |
| Expiry date | Nov 8, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00353
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved logic level translator circuit for translating logic signals of non-TTL circuits to logic signals of TTL circuits is presented. The translator circuit as presented includes circuitry for providing elimination of noise spiking and the resultant erroneous switching caused by simultaneous conduction of TTL circuit outputs as they change states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.