Dual-port read/write RAM with single array
US4623990A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 1984 |
| Grant date | Nov 18, 1986 |
| Priority date | — |
| Expiry date | Oct 31, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A single-array memory employs a novel storage cell providing dual read/write access via either an "A"-side or a "B"-side. The storage cell uses a unique circuit in which read current is borrowed during writing into the cell. Asymmetrical read/write delay circuitry is provided to avoid overwriting the contents of a storage cell during the read-to-write transition. Row-selection decoders use Schottky-clamping diodes in a way which provide an equivalent oscillation-damping capacitance at the base of the selected-row driver transistor. The single-array memory can be advantageously used as part of a single-chip VLSI four-port register file permitting simultaneous reading and/or writing of registers from any of two read ports or two write ports, respectively. Unidirectional busses connect each storage cell to each of the four ports.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.