Decoupling capacitor for Pin Grid Array package
US4626958A · kind A · utility
22Cited by
8References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1985 |
| Grant date | Dec 2, 1986 |
| Priority date | — |
| Expiry date | Dec 20, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/916
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
High frequency noise is decoupled from power supplied to a Pin Grid Array (PGA) package by insertion of a decoupling capacitor between the PGA package and printed circuit board. The decoupling capacitor comprises a dielectric material sandwiched between a pair of conductors and having a plurality of leads extending from each conductor. In accordance with the present invention, the decoupling capacitor is individually dimensioned and configured to fit under a PGA package and correspond to the power and ground pin configuration of that PGA package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.