Chip select speed-up circuit for a memory
US4630239A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1985 |
| Grant date | Dec 16, 1986 |
| Priority date | — |
| Expiry date | Jul 1, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory circuit is provided which has a select and a deselect mode. The memory circuit, as part of its technique for quickly accessing data, includes circuitry for generating a pulse in response to detecting an address transition. When the memory circuit switches from the deselect mode to the select mode, these appears to be an address transition even when there is not an address transition. In order to prevent a delay associated with interpreting such false transition as an actual transition, the detection of address transitions is suppressed for a predetermined delay time following the transition from the select to deselect modes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.