Patent · US Expired

Special interconnect for configurable logic array

US4642487A · kind A · utility

455Cited by
7References
3Claims
0Family size

Assignee

Inventor

Key dates

Filing dateSep 26, 1984
Grant dateFeb 10, 1987
Priority date
Expiry dateSep 26, 2004

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/17704
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A special interconnect circuit which connects adjacent configurable logic elements (CLEs) in a configurable logic array (CLA) without using the general interconnect structure of the CLA. In one embodiment, an array of CLEs is arranged in rows and columns and a special vertical lead circuit is provided which connects an output lead of a given CLE in a given column to a selected input lead of the CLE above it and below in the same column. Special horizontal lead circuits are provided which connect a given output lead of a given CLE to a selected adjacent input lead of the CLE in the same row.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.