Forming thick dielectric at the bottoms of trenches utilized in integrated-circuit devices
US4643804A · kind A · utility
10Cited by
3References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 25, 1985 |
| Grant date | Feb 17, 1987 |
| Priority date | — |
| Expiry date | Jul 25, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/665
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Selective wet or plasma anodization is utilized for forming a relatively thick dielectric layer only at the bottoms of trenches included in DRAM and/or CMOS devices. In that way, the electrical characteristics of trenches that include bottoms having surface roughness and/or sharp or irregular corners are significantly improved. Additionally, electrically isolated capacitor structures in elongated trenches formed in DRAM devices are thereby made feasible.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.