Resist development method
US4647172A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 1985 |
| Grant date | Mar 3, 1987 |
| Priority date | — |
| Expiry date | May 17, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/948
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
In the resist development method disclosed herein, the spin development of a resist coating on the surface of a semiconductor wafer is monitored by measuring light scattered back from the wafer surface from an incandescent source. During development, the sensed light level oscillates due to optical fringing caused by the thinning of the resist layer in the exposed areas and the fringe generated oscillation essentially stops when the development breaks through in the exposed areas. By comparing sample data obtained from the sensed light level with template data representing a known or characteristic behavior, a control point corresonding to the last fringe may be determined. Development is then terminated a calculated time after the control point.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.