Circuit arrangement for zero point balancing of an integrated operational amplifier
US4651110A · kind A · utility
3Cited by
1References
14Claims
0Family size
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Key dates
| Filing date | Sep 24, 1985 |
| Grant date | Mar 17, 1987 |
| Priority date | — |
| Expiry date | Sep 24, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45995
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a zero point balancing system employing a balance capacitor switched by means of semiconductor switches, balancing errors due to parasitic capacitance of these switches, as well as due to picked up interferences at the output of the operational amplifier, are avoided with the assistance of an RC element connected in a defined fashion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.