Multiple output port memory storage module
US4652993A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 1984 |
| Grant date | Mar 24, 1987 |
| Priority date | — |
| Expiry date | Apr 2, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Within a High Performance Storage Unit (HPSU) digital memory resource, plural ones (up to 4) of a multiplicity (nominally 8) of independently operative storage memory banks, each consisting of four storage modules, are each simultaneously communicating voluminous read data (nominally 144 data bits plus 16 parity bits) read from each to a respective one of plural (nominally 4) output ports of the memory resource, said communicating being upon and via a selected one of a like plural number (4) of wired-OR communication buses. Priority control does assure that all (up to 4 such) of the (8) storage memory banks simultaneously reading data are (1) each doing so responsively to a request arising upon a different one of (4) memory resource input ports, and are (2) each controlled to selectively emplace the data read upon one only of a multiple number (4) of output ports of the (8) storage memory banks, and the (4) storage modules within each of the (8) storage memory banks--respective ones of each of the (4) storage memory bank ports connecting to a respective one of the four (4) wired-OR communication buses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.