Method of manufacturing an insulated gate field effect device
US4653173A · kind A · utility
4Cited by
16References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 4, 1985 |
| Grant date | Mar 31, 1987 |
| Priority date | — |
| Expiry date | Mar 4, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating insulated gate field effect transistors in NMOS or CMOS with source and drain regions having lightly doped extensions wherein the source and drain regions are made with a self-aligned process and a device made in accordance with such a method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.