Teh-Yi J. Chen
8Patents
7h-index
7Co-inventors
52Inventor score
Filing activity: Jul 2, 1984 → Aug 29, 1996
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5424567A | Protected programmable transistor with reduced parasitic capacitances and method of fabrication | Electricity | 80 | Expired |
| US4786609A | Method of fabricating field-effect transistor utilizing improved gate sidewall spacers | Emerging Cross-Sectional Technologies | 51 | Expired |
| US5110757A | Formation of composite monosilicon/polysilicon layer using reduced-temperature two-step silicon deposition | Emerging Cross-Sectional Technologies | 41 | Expired |
| US5766991A | CMOS process utilizing disposable silicon nitride spacers for making lightly doped drain | Electricity | 39 | Expired |
| US5486480A | Method of fabrication of protected programmable transistor with reduced parasitic capacitances | Electricity | 18 | Expired |
| US5008212A | Selective asperity definition technique suitable for use in fabricating floating-gate transistor | Emerging Cross-Sectional Technologies | 13 | Expired |
| US4584205A | Method for growing an oxide layer on a silicon surface | Electricity | 10 | Expired |
| US4653173A | Method of manufacturing an insulated gate field effect device | Electricity | 4 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.