Electrically erasable programmable RAM
US4656607A · kind A · utility
39Cited by
1References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 19, 1984 |
| Grant date | Apr 7, 1987 |
| Priority date | — |
| Expiry date | Jul 19, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0408
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor memory made up of semiconductor memory elements, each consisting of a transistor of an MOS structure which has a charge-storage layer and which is formed on a semiconductor substrate, the improvement wherein a switching element is provided so that positive or negative charge can be stored or discharged from the charge-storage layer in a mode for writing data, and the charge-storage layer can be allowed to float electrically when in a mode for reading data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.