Semiconductor device of an LDD structure having a floating gate
US4663645A · kind A · utility
79Cited by
5References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 22, 1985 |
| Grant date | May 5, 1987 |
| Priority date | — |
| Expiry date | May 22, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/90
Abstract
A semiconductor integrated circuit device is provided which includes first field effect transistors of an LDD structure having a floating gate as memory cells and second field effect transistors of the LDD structure as elements other than the memory cells. A shallow, low impurity concentration region of the first field effect transistor which is a part of its source or drain region has a higher impurity concentration than a shallow, low impurity concentration region of the second field effect transistor which is a part of its source or drain region. The device is particularly useful in an EPROM arrangement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.