Patent · US Expired

Fabrication of dielectrically isolated fine line semiconductor transducers and apparatus

US4672354A · kind A · utility

62Cited by
6References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 5, 1985
Grant dateJun 9, 1987
Priority date
Expiry dateDec 5, 2005

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10T29/49103
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

There is disclosed apparatus and methods of fabricating a piezoresistive semiconductor structure for use in a transducer. According to one method, a layer of silicon dioxide is grown over the surface of a first semiconductor wafer which is designated as a carrier wafer. A layer of glas is then formed on the top surface of the carrier wafer over said layer of silicon dioxide. A second wafer has diffused therein a high conductivity semiconductor layer which is diffused on a top surface of a sacrificial semiconductor wafer. The first and second wafers are then bonded together by means of an electrostatic bond with the high conductivity layer of the sacrificial wafer facing the glass layer of the first wafer. After securing the wafers together, one may etch away the remaining portion of the sacrificial wafer to provide a high conductivity resistive layer which is secured to the glass layer of the first wafer and is patterned to form a resistive network using standard photolithographic making. In another embodiment, the sacrificial wafer is processed by means of a high conductivity diffusion procedure whereby a resistive line pattern is formed in the second wafer. After diffusion, the s…

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.