Process to increase tin thickness
US4676866A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 1986 |
| Grant date | Jun 30, 1987 |
| Priority date | — |
| Expiry date | Mar 7, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/48
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A local interconnect system for VLSI integrated circuits. During self-aligned silicidation of exposed moat and gate regions in a nitrogen atmosphere, a conductive titanium nitride layer is formed overall. A second titanium layer is then deposited overall and again reacted, to thicken the nitride layer without increasing the thickness of the silicide layers. This conductive layer is patterned and etched to provide local interconnects with a sheet resistance of the order to ten ohms per square, and also etch stops. Moreover, this local interconnect level permits contacts to be misaligned with the moat boundary, since the titanium nitride local interconnect layer can be overlapped from the moat up on to the field oxide to provide a bottom contact and diffusion barrier for a contact hole which is subsequently etched through the interlevel oxide. This local interconnect capability fulfills all of the functions which a buried contact capability fulfill, and fulfills other functions as well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.