TTL compatible merged bipolar/CMOS output buffer circuits
US4678940A · kind A · utility
19Cited by
3References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 8, 1986 |
| Grant date | Jul 7, 1987 |
| Priority date | — |
| Expiry date | Jan 8, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09429
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Output buffer circuits formed of merged bipolar transistor and CMOS transistors to produce either two output states or three output states includes a plurality of CMOS transistors and a pair of bipolar transistors. The output buffer circuits have high current drive capabilities and low propagation delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.