Redundancy enable/disable circuit
US4689494A · kind A · utility
72Cited by
9References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 18, 1986 |
| Grant date | Aug 25, 1987 |
| Priority date | — |
| Expiry date | Sep 18, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0963
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A redundancy enable/disable circuit for enabling and disabling subsequently the use of redundant elements includes first through third P-channel MOS transistors, an N-channel MOS transistor, an enable fuse, and a disable fuse. The enable fuse is blown so as to enable the use of the redundant elements, and the disable fuse is blown subsequently to disable use of the redundant elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.