CMOS high voltage switch
US4689495A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 17, 1985 |
| Grant date | Aug 25, 1987 |
| Priority date | — |
| Expiry date | Jun 17, 2005 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A CMOS high voltage switch for interfaceing between a decoder output and an input to an erasable, programmable read-only-memory includes an inverter for receiving an input signal from the output of the decoder. A N-channel MOS pass transistor has a conduction path and a gate electrode. One end of the conduction path is connected to the output of the inverter, and the other end of the conduction path is connected to an output node. The gate electrode of the pass transistor is connected to a first lower supply potential. A pumping device is connected to the other end of the conduction path for pumping the output node to a first higher voltage during a first mode of operation. A P-channel MOS switching transistor is also connected to the other end of the conduction path for switching the output node to a second lower voltage during a second mode of operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.