Phase-coherent demodulation clock and data recovery
US4694257A · kind A · utility
5Cited by
2References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1986 |
| Grant date | Sep 15, 1987 |
| Priority date | — |
| Expiry date | Jun 17, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2335
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A circuit and method for demodulation of transmitted phase-coherent signals including recovery of the clock and data signals associated therewith. A clock recovery circuit detects a zero crossing of the transmitted signal which occurs every one-half period of the lowest frequency transmitted signal. A data recovery circuit detects the presence or absence of a zero crossing during a window portion of each one-half period of the lowest frequency transmitted signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.