Process for forming MOS transistor with buried oxide regions for insulation
US4700454A · kind A · utility
51Cited by
5References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 4, 1985 |
| Grant date | Oct 20, 1987 |
| Priority date | — |
| Expiry date | Nov 4, 2005 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76281
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
MOS process for forming field-effect devices in self-alignment with a buried oxide region. Oxygen is implanted in alignment with masking members after gates have been defined from the masking members. The masking members block the oxygen implantation and thus the channel regions of subsequently formed transistors are self-aligned with openings in the buried oxide layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.