Method for making germanium/gallium arsenide high mobility complementary logic transistors
US4710478A · kind A · utility
16Cited by
25References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 20, 1985 |
| Grant date | Dec 1, 1987 |
| Priority date | — |
| Expiry date | May 20, 2005 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/933
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to complementary logic field effect transistors having high electron and hole mobility and above to maintain transistor action at cryogenic temperatures. In one embodiment germanium material is deposited upon a gallium arsenide substrate and high hole concentration areas and high electron concentration areas are created in the germanium layer. In another embodiment a germanium substrate is provided and a gallium arsenide layer is grown upon the germanium substrate with appropriate high hole concentration areas and high electron concentration areas being created within the gallium arsenide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.