Process for producing by sloping etching a thin film transistor with a self-aligned gate with respect to the drain and source thereof

US4715930A · kind A · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventor

• Bernard Diem · Échirolles, FR

Key dates

• Filing date: Nov 13, 1986
• Grant date: Dec 29, 1987
• Expiry date: Nov 13, 2006

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/978

Abstract

Process for producing by sloping etching a thin film transistor with a self-aligned gate with respect to its drain and source and transistor obtained by this process. The process consists of producing the transistor gate on a glass substrate, depositing an insulating layer on the substrate and gate, depositing a thick hydrogenated amorphous silicon layer on the insulating layer, depositing a positive photosensitive resin layer on the silicon layer, irradiating the resin layer through the substrate, the gate serving as an irradiation mask, developing the resin, chemically etching by successive, partial operations the silicon layer until the insulating layer is exposed, the remaining resin serving both as a mask and being etched following each etching operation of the silicon layer and producing the electrical contacts and source and drain electrodes of the transistor. Application to the production of active matrixes for liquid crystal flat screens.