Differential amplifier stage having circuit elements for setting the gain to zero
US4717887A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 8, 1986 |
| Grant date | Jan 5, 1988 |
| Priority date | — |
| Expiry date | Oct 8, 2006 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/72
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Differential amplifier stage, having circuit elements for setting the gain to zero, includes a first transistor and a second transistor, whose bases are respectively connected to the positive terminal of a voltage source by a first current generator and a second current generator and are also respectively connected to the emitters of a third and a fourth transistor via a first and a second diode. The emitters of the first and second transistors are both coupled to the negative terminal of the voltage source by means of a third current generator. The collectors of the third and fourth transistors are connected to the negative terminal of the voltage source. The base terminals of the third and fourth transistors respectivlely form first and second input terminals. On the other hand, the collector terminals of the first and second transistors form first and second output terminals. The differential amplifier stage includes a fifth transistor whose collector is respectively connected to the bases of the first and second transistors via a third and a fourth diode, and whose emitter is connected to the negative terminal of the voltage source. The base terminal of this fifth transistor fo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.