Method of forming identically positioned alignment marks on opposite sides of a semiconductor wafer
US4732646A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 1987 |
| Grant date | Mar 22, 1988 |
| Priority date | — |
| Expiry date | Mar 17, 2007 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/975
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of automatically forming identically positioned alignment marks on the front side and the back side of a silicon wafer especially prepared for use in silicon micromechanical technology. The front side and the back side of the silicon wafer are coated with an insulating layer. High-energy heavy ions are directed onto the front side insulating layer. The heavy ions penetrate the front side insulating layer, the wafer, and the back side insulating layer, thus forming single disturbed crystal lattice nuclear tracks in both insulating layers, with the wafer remaining undisturbed. The nuclear tracks in both insulating layers are etched so that corresponding identically positioned pores are opened. These pores are used as alignment marks for individual further method steps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.